Verification Engineer Lead

CoMira helps innovative semiconductor manufacturers make markets. The company’s Ethernet, Error Correction and Security IP solutions — along with a complete services suite — enables companies to deliver chips optimized for networking, artificial intelligence, machine learning, high-performance computing and servers. For more than 10 years, CoMira has been a trusted partner for some of the biggest names in the business and specialized startups. 

Working in this role, you will be a technical lead/expert contributing to our digital verification projects with our product development team. 

We are looking for a “hands on” active participant and technologist to provide expertise in Digital ASIC Verification and to help continue to grow our exciting start-up company to the next level. 

You will perform RTL verification using SystemVerilog and object oriented tests using UVM, write documentation, develop verification environments, testbenches and verification components, verify design implementations, and develop test benches and test cases for simulation platforms according to design/architecture specification.

Other verification duties include:

  • Architecting a SystemVerilog/UVM test environment 
  • Creating a stimulus and test plan to verify a design per its functional specification and applicable standards
  • Designing and implementing UVM ComponentsUsing third-party VIP to verify components of the ASIC IP
  • Performing Code and Test Plan reviews
  • Planning for, implementing, and analyzing functional coverage
  • Scoping, planning, and tracking verification activities including test development, and test and coverage plan execution
  • Designing and tracking multiple product regressions while succinctly and accurately reporting status 
  • Creating a UVM environment from scratch
  • Reviewing standards updates to ensure test plan remains in compliance
  • Debugging issues with the verification environment and tests
  • Recreating field issues using the verification environment

We are looking for an employee with more than 5 years of experience and knowledge of:

  • Networking protocols – specifically as 802.3 (Ethernet) and related standards 
  • Security algorithms used in networking and adjacent domains
  • Forward Error Correction
  • Technical leadership
  • Verilog/SystemVerilog
  • Test benches, UVM,OVM,VIP
  • Creating UVM agents and environments from scratch
  • Perl/Python or other scripting
  • Unix/Linux scripting (perl, tcl, python, shell) with advanced debug skills
  • Advanced debugging skills
  • FPGA implementation knowledge a plus
  • Tools: Cadence Incisive, Genus, Spyglass 

Education Required: Bachelor or Masters Degree in Electrical and/or Computer Engineering

Interested in this role? Apply on LinkedIn!