Digital Design Verification Engineer, Entry Level

This position is located at the CoMira’s design center in Pittsburgh, PA.

In this role, you will be contributing to our digital verification projects with our product development team. We are looking for a “hands on” active participant and technologist to help continue to grow our exciting start-up company. We are looking for full-time and interns!

You will be working with a small team of engineers. You will perform subsystem and full chip verification using Verilog by developing and running object oriented tests using UVM, developing verification environments, testbenches and verification components, test cases for according to design/architecture specification.

Duties include:

● ASIC digital design verification

● Scoping, planning, and tracking verification activities including test and coverage plans

● Tracking product regressions and succinctly and accurately reporting status

● Architecting a SystemVerilog/UVM test environment

We are looking for an employee with knowledge of:

● ASIC digital design verification

● Networking protocols – specifically as IEEE 802.3 and related standards

● Technical leadership

● RTL design and verification in System Verilog

● Testbench design with UVM

● Ethernet and other Network Protocols

● Python/Perl/Shell scripting.

● Advanced debugging skills

Education Required: Bachelor or Master’s Degree in Electrical and/or Computer Engineering

Interested in this role? Apply on LinkedIn!