Digital Hardware Design Manager

CoMira helps innovative semiconductor manufacturers make markets. The company’s Ethernet, Error Correction and Security IP solutions — along with a complete services suite — enables companies to deliver chips optimized for networking, artificial intelligence, machine learning, high-performance computing and servers. For more than 10 years, CoMira has been a trusted partner for some of the biggest names in the business and specialized startups. 

We are looking for a hands-on technologist to provide leadership and expertise in Digital ASIC Design contributing to our ASIC IP product development. In this role you will perform architecture, microarchitecture, RTL design, logic synthesis, and timing analysis, write documentation, and review test plans and coverage.

Design Manager duties include:

  • Evaluating RFQs and providing technical responses regarding functionality, power, performance, and area
  • Documentation including functional specifications, architecture, and microarchitecture.
  • RTL coding, linting, and simulation
  • Leading design reviews
  • Performing code coverage analysis
  • Scoping, planning, and tracking design activities and product releases
  • Giving feedback to verification team on test plans and testing results, debugging/fixing failures
  • Performing synthesis related tasks including writing timing constraints, performing logic synthesis, analyzing synthesis reports, achieving timing closure, and implementing ECOs
  • Providing technical support for field issues requiring engineering input

We are looking for an employee with more than 5 years of experience and knowledge of:

  • Technical leadership
  • Digital design knowledge including state machines, datapaths, fifo design, async crossings, clock and reset concepts, high-speed logic, etc.
  • Verilog/SystemVerilog and synthesizable concepts
  • Unix/Linux scripting (perl, tcl, python, shell) 
  • Advanced debugging skills
  • Networking protocols 
    • 802.3 (Ethernet) and related standards 
    • PCIe, CXL, and related standards
  • Security algorithms used in networking and adjacent domains
  • Forward Error Correction
  • UVM,OVM,VIP a plus
  • FPGA implementation knowledge a plus
  • Tools: Cadence, Mentor, Synopsys, Spyglass, Git 

Education Required: Bachelor or Masters Degree in Electrical and/or Computer Engineering

This position is located at the CoMIRA Solutions Design Center in Pittsburgh, PA. To learn more about CoMIRA visit www.comira-inc.com.

Interested in this role? Email us at jobs@comira-inc.com.

 

Engineering Intern

This position is located at the CoMira’s design center in Pittsburgh, PA.

In this role, you will be contributing to our digital verification projects with our product development team. We are looking for a “hands on” active participant and technologist to help continue to grow our exciting start-up company. We are looking for full-time and interns!

You will be working with a small team of engineers. You will perform subsystem and full chip verification using Verilog by developing and running object oriented tests using UVM, developing verification environments, testbenches and verification components, test cases for according to design/architecture specification.

Duties include:

● ASIC digital design verification

● Scoping, planning, and tracking verification activities including test and coverage plans

● Tracking product regressions and succinctly and accurately reporting status

● Architecting a SystemVerilog/UVM test environment

We are looking for an intern with interest in:

● ASIC digital design verification

● Networking protocols – specifically as IEEE 802.3 and related standards

● Technical leadership

● RTL design and verification in System Verilog

● Testbench design with UVM

● Ethernet and other Network Protocols

● Python/Perl/Shell scripting.

● Advanced debugging skills

Education Required: Bachelor or Master’s Degree in Electrical and/or Computer Engineering

Interested in this role? Email us at jobs@comira-inc.com.

Digital Design Verification Engineer, Entry Level

This position is located at the CoMira’s design center in Pittsburgh, PA.

In this role, you will be contributing to our digital verification projects with our product development team. We are looking for a “hands on” active participant and technologist to help continue to grow our exciting start-up company. We are looking for full-time and interns!

You will be working with a small team of engineers. You will perform subsystem and full chip verification using Verilog by developing and running object oriented tests using UVM, developing verification environments, testbenches and verification components, test cases for according to design/architecture specification.

Duties include:

● ASIC digital design verification

● Scoping, planning, and tracking verification activities including test and coverage plans

● Tracking product regressions and succinctly and accurately reporting status

● Architecting a SystemVerilog/UVM test environment

We are looking for an employee with knowledge of:

● ASIC digital design verification

● Networking protocols – specifically as IEEE 802.3 and related standards

● Technical leadership

● RTL design and verification in System Verilog

● Testbench design with UVM

● Ethernet and other Network Protocols

● Python/Perl/Shell scripting.

● Advanced debugging skills

Education Required: Bachelor or Master’s Degree in Electrical and/or Computer Engineering

Interested in this role? Apply on LinkedIn!